1. Field of the Invention
The present invention relates to a semiconductor circuit device and a display data line driver comprising the semiconductor circuit device, more specifically to a display data line driver used for driving a display panel on which an image is displayed with a high-voltage driving signal such as a plasma display panel.
2. Description of the Related Art
In recent years, a plasma display panel (hereinafter, referred to as PDP) which has been attracting attention as a thin and high-definition display device comprises a plurality of discharge cells consisting of data electrodes and scan/sustain electrodes arranged in a matrix shape. In the discharge cells, discharge are controlled by data electrode wirings and san electrode wirings and sustain electrode wirings that is orthogonal to the data electrode wirings, and a desired display image is obtained through the discharges emission or non-light emission.
In order to drive the PDP thus constituted, a semiconductor circuit device including a level shifter for converting a digital RGB color image signal into a high voltage capable of driving the PDP is used.
In the circuit for driving the PDP comprising the semiconductor circuit device, an NPN parasitic bipolar transistor is formed. However, a current characteristic of the NPN parasitic bipolar transistor is determined by physical constitution, diffusion concentration, voltage between collector and emitter. Therefore, as a drive power-supply voltage (VCC) is higher and a collector current is larger, thermal destruction is more easily generated because a high electric field is applied to a collector junction.
In order to deal with the disadvantage, a destruction resistance can be improved in such a manner that a sufficient distance is secured between adjacent transistors or a SOI (Silicon Oxide Insulated) in which the transistors are insulated with a silicon oxide film is provided as recited in No. 2001-53228 of the Japanese Patent Applications Laid-Open.
In the conventional drive circuit thus improved, however, costs are increased by such factors as mentioned below.                chip size is increased in order to secure the distance between the adjacent transistors.        A specially arranged process is necessary to make a structure without the formation of the parasitic transistor.        